Budapest University of Technology and Economics, Faculty of Electrical Engineering and Informatics

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    System Design Laboratory Practice

    A tantárgy neve magyarul / Name of the subject in Hungarian: Rendszertervezés laboratórium

    Last updated: 2019. május 6.

    Budapest University of Technology and Economics
    Faculty of Electrical Engineering and Informatics

    Major in Electrical Engineering

    Subject of Smart Systems Integration+ EMJMD
    Course ID Semester Assessment Credit Tantárgyfélév
    VIEEM253 2 0/0/3/f 4  
    3. Course coordinator and department Dr. Ender Ferenc,
    4. Instructors

    Name:

    Affiliation:

    Department, institute:

    Dr. Gábor Takács

    Assistant Professor

    Department of Electron Devices

    Dr. Ferenc Ender

    Associate Professor

    Department of Electron Devices

    5. Required knowledge

    Electronics, VLSI Circuits

    6. Pre-requisites
    Kötelező:
    NEM ( TárgyEredmény( "BMEVIEEMA03" , "jegy" , _ ) >= 2
    VAGY
    TárgyEredmény("BMEVIEEMA03", "FELVETEL", AktualisFelev()) > 0)

    A fenti forma a Neptun sajátja, ezen technikai okokból nem változtattunk.

    A kötelező előtanulmányi rend az adott szak honlapján és képzési programjában található.

    7. Objectives, learning outcomes and obtained knowledge

    The aim of the course is an introduction to the steps of system level design and to the design approach of state of the art integrated circuits. The students are getting familiar with up to date CAD systems operation and maintenance.


    8. Synopsis

    Week 1 – Getting know the hardware and software environment. Top-down approach of digital circuits design

    Week 2 – Introduction to Design Flow through a concrete example (design of the ALU of a CPU)

    Week 3 – General structure of EDA systems, licensing issues, synthesis systems

    Week 4-6 – Behavioral description of a hardware unit using Hardware description language, logical simulation

    Week 7-8 – Synthesis of a digital circuit using the EDA tools

    Week 9 – Technological optimization of the chosen circuit, runtime analysis. Temperature analysis, Monte Carlo analysis.

    Week 10 – Identification of critical routes

    Week 11 – Design for testability – approaches and possible implementations

    Week 12-13 – Layout design (floorplan, placing, global routing, power rounting, detailed routing)

    Week 14 – Final testing of the implemented ASIC, design documentation generation

    9. Method of instruction

    Laboratory practice with computer workstations

    10. Assessment

    The course ends with intermediate grading assumed that the five small projects during the semester were completed with at least satisfactory grade.

    11. Recaps

    A small project can be repeated in the repeat week.

    12. Consultations

    A small project can be repeated in the repeat week.

    13. References, textbooks and resources

    EDA Operation Manual

    14. Required learning hours and assignment

    Classes

    42

    Preparation for classes

    0

    Preparation for classroom practices

    0

    Preparation for laboratory

    42

    Homework

    36

    Learning the prescribed matters

    0

    Preparation for exam

    0

    Sum

    120

    15. Syllabus prepared by

    Name:

    Affiliation:

    Department, institute:

    Dr. Vladimir Székely

    Professor

    Department of Electron Devices

    Dr. András Poppe

    Associate Professor

    Department of Electron Devices

    Dr. Péter Gaerner

    Associate Professor

    Department of Electron Devices

    Dr. György Bognár

    Associate Professor

    Department of Electron Devices

    Gyula Horváth

    Assistant Professor

    Department of Electron Devices